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TC7MH273FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MH273FK
Octal D-Type Flip Flop with Clear
The TC7MH273FK is an advanced high speed CMOS octal D-type flip-flop fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the clock pulse. When the CLR input is held "L", the Q outputs are at a low logic level independent of the other inputs. An input protection circuit ensures that 0 to 7 V can be applied Weight: 0.03 g (typ.) to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Features
* * * * * * * * High speed: fmax = 165 MHz (typ.) (VCC = 5 V) Low power dissipation: ICC = 4 A (max) (Ta = 25C) High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs. Balanced propagation delays: tpLH tpHL - Wide operating voltage range: VCC (opr) = 2~5.5 V Low noise: VOLP = 0.8 V (max) Pin and function compatible with 74ALS273
000630EBA1
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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TC7MH273FK
Pin Assignment (top view) IEC Logic Symbol
(1) (11)
CLR
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12 11
VCC Q8 D8 D7 Q7 Q6 D6 D5 Q5 CK
CLR CK
R C1
Q1 D1 D2 Q2 Q3 D3 D4 Q4
D1 D2 D3 D4 D5 D6 D7 D8
(3) (4) (7) (8) (13) (14) (17) (18)
1D
(2) (5) (6) (9) (12) (15) (16) (19)
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
GND 10
Truth Table
Inputs
CLR
Outputs CK X Q L L H Qn
Function Clear No change
D X L H X
L H H H
X: Don't care
System Diagram
D1 3 DR D2 4 DR D3 7 DR D4 8 DR D5 13 DR D6 14 DR D7 17 DR D8 18 DR
CLR
1
CK CK 11
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
2 Q1
5 Q2
6 Q3
9 Q4
12 Q5
15 Q6
16 Q7
19 Q8
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Maximum Ratings
Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating -0.5~7.0 -0.5~7.0 -0.5~VCC + 0.5 -20 20 25 75 180 -65~150 Unit V V V mA mA mA mA mW C
Recommended Operating Conditions
Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dv Rating 2.0~5.5 0~5.5 0~VCC -40~85 0~100 (VCC = 3.3 0.3 V) 0~20 (VCC = 5 0.5 V) Unit V V V C ns/V
Electrical Characteristics DC Characteristics
Characteristics Symbol Test Condition VCC (V) 2.0 "H" level Input voltage 2.0 "L" level VIL 3.0~5.5 2.0 VIN = VIH or VIL IOH = -50 A IOH = -4 mA Output voltage VIN = VIH or VIL IOH = -8 mA IOL = 50 A 3.0 4.5 3.0 4.5 2.0 3.0 4.5 IOL = 4 mA IOL = 8 mA Input leakage current Quiescent supply current IIN ICC VIN = 5.5 V or GND VIN = VCC or GND 3.0 4.5 0~5.5 5.5 VIH 3.0~5.5 Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.58 3.94 Ta = 25C Typ. 2.0 3.0 4.5 0 0 0 Max 0.50 VCC x 0.3 0.1 0.1 0.1 0.36 0.36 0.1 4.0 Ta = -40~85C Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.48 3.80 Max V 0.50 VCC x 0.3 0.1 0.1 0.1 0.44 0.44 1.0 40.0 A A V Unit
"H" level
VOH
"L" level
VOL
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Timing Requirements (Input: tr = tf = 3 ns)
Characteristics Minimum pulse width (CK) Minimum pulse width ( CLR ) Minimum set-up time tw (L) Symbol tw (L) tw (H) Test Condition VCC (V) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 Ta = 25C Typ. Limit 5.5 5.0 5.0 5.0 5.5 4.5 1.0 1.0 2.5 2.0 Ta = -40~85C Limit 6.5 5.0 6.0 5.0 6.5 4.5 1.0 1.0 2.5 2.0 ns ns ns ns ns Unit
ts
Minimum hold time Minimum removal time ( CLR )
th
trem
AC Characteristics (Input: tr = tf = 3 ns)
Characteristics Symbol Test Condition VCC (V) CL (pF) 3.3 0.3 tpLH tpHL 5.0 0.5 15 50 15 50 15 50 15 50 15 50 15 50 50 50 Min 75 50 120 80 (Note2) Ta = 25C Typ. 8.7 11.2 5.8 7.3 8.9 11.4 5.2 6.7 120 75 165 110 4 31 Max 13.6 17.1 9.0 11.0 13.6 17.1 8.5 10.5 1.5 1.0 10 Ta = -40~85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 65 45 100 70 Max 16.0 19.5 10.5 12.5 16.0 19.5 ns 10.0 12.0 1.5 1.0 10 pF pF ns MHz ns Unit
Propagation delay time (CK-Q)
Propagation delay time ( CLR -Q) tpHL
3.3 0.3 5.0 0.5
3.3 0.3 Maximum clock frequency fmax 5.0 0.5 tosLH tosHL Input capacitance Power dissipation capacitance CIN CPD 3.3 0.3 5.0 0.5
Output to output skew
(Note1)
Note1: This parameter is guaranteed by design. tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn| Note2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD VCC fIN + ICC/8 (per F/F) And the total CPD when n pcs of flip-flop operate can be gained by the following equation: CPD (total) = 22 + 9 n
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Noise Characteristics (Input: tr = tf = 3 ns)
Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Symbol VOLP VOLV VIHD VILD Test Condition VCC (V) CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF 5.0 5.0 5.0 5.0 Ta = 25C Typ. 0.5 -0.5 Limit 0.8 -0.8 3.5 1.5 V V V V Unit
Minimum high level dynamic input voltage VIH Maximum low level dynamic input voltage VIL
Input Equivalent Circuit
Input
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Package Dimensions
Weight: 0.03 g (typ.)
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